Local processor C  


The local processor: It is linked to the remotely located RADAR controller and is located in each of the four transmitter rooms. It supplies the required transmit correction phases during transmission and receive correction phases during reception, reading from preloaded RAMs, to the 8 bit phase shifters, based on the control signals, received from the RADAR controller. These correction phases are required to steer the antenna beam to the desired angle. The local processor receives the status and monitoring signals such as excess grid current, excess anode voltage, excess anode current etc. from the status monitoring and interlock circuits located in the transmitter and digitizes them. These digitized signals will be sent to the remotely located RADAR controller for monitoring and to ensure the safety of the transmitter. It controls the operations of the transmitters like switching the transmitter ON and OFF, switching the RF ON and OFF, etc.

We offered highly integrated, 144 macrocell, Xilinx CPLD based design, including multichannel ADC and high-speed micro-controller.

  • The system is carefully designed to communicate with remote RADAR controller, at synchronized clock instants.
  • The system has ability to sense the multiple timing signals from RADAR controller and with complex FSMs, integrated inside CPLDs, can process these timing signals based on the commands from RADAR controller and port them to the output, through programmable delay lines.
  • The system can address more than 50 ports for input and output at precision timed signal edges.
  • The system has multiple pointer based circular buffers which can work simultaneously, to access, different preloaded phase shifter data patterns from the onboard RAMs and loadthe 16 phase shifters (Transmitters and receivers) with in 4µ sec benchmark time.
  • The system has 8-channel analog sections that can monitor status signal of the transmitters and send the digitized data to the remote RADAR controller for monitoring.
  • The system has built in self test (BIST) routines to monitor system condition periodically.
  • The system has cunningly implemented, the multiple bi-directional buses.
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